1. Field of the Invention
The present invention relates to a solid-state imaging device and a method of manufacturing the same, in particular relates to the reduction of a leak between electrodes.
2. Description of the Related Art
A solid-state imaging device using CCD used in an area sensor has a photoelectric conversion portion such as diode, and a charge transfer portion equipped with charge transfer electrodes for transferring the signal from the photoelectric conversion portion. The charge transfer electrodes are arranged on a charge transfer line formed on a semiconductor substrate such that a plurality of charge transfer electrodes are arranged contiguously and driven in sequence.
In recent years, in the solid-state imaging device, demands for the increase of resolution and sensitivity go on rising, and the increase of imaging pixel number has reached giga pixel or higher. A substrate in which a solid state imaging device is built (a silicone substrate) is packaged by laminating a filter and lens. Therefore, the accuracy of the positioning of a lens and a photoelectric conversion portion is important, and the distance, i.e., the distance in the height direction, is also a great problem in the positioning accuracy in manufacturing process and in the aspect of sensitivity (photoelectric transfer efficiency) at the time of use.
Further, for achieving higher resolution in such a situation without enlarging the chip size of a solid-state imaging device, it is necessary to reduce area per a unit pixel and to devise higher integration. On the other hand, as the reduction of the area of photodiode constituting a photoelectric conversion portion results in the reduction of sensitivity, the area of photodiode region must be ensured.
Accordingly, various studies are carried on for the purpose of miniaturizing the chip size of a solid-state imaging device while securing the occupied area of a photodiode region by fining a charge transfer portion and the wiring of the peripheral circuits to thereby reduce the area ratio of wiring.
To realize the elevation of integration by fining wiring under these circumstances, the improvement of pressure resistance of a layer insulating film between a charge transfer portion and a wiring layer and thinning are important technical problems in addition to the flattening of surface.
For example, a structure comprising a charge transfer portion of a single layer electrode structure is proposed for the improvement of flatness (e.g., JP-A-8-274302). For the realization of the structure, the pattern of a first electrode is formed by a first layer electric conductive film, thereafter an electrode insulating film is formed by thermal oxidation, and a second layer electric conductive film is formed as the upper layer.
In related art solid-state imaging devices using charge transfer electrodes of a single layer structure, a polycrystal silicon or amorphous silicon layer is used as the charge transfer electrodes, and after a first layer wiring is formed, the pattern surface of the first layer wiring is coated with a silicon oxide film by thermal oxidation of the pattern surface, a polycrystal silicon or amorphous silicon layer of a second transfer electrode is laminated thereon, and then polishing is carried out by a CMP (chemical mechanical polishing) method, or resist is coated and entire etching is carried out according to a resist etch back method, thereby making a single layer of electrode is achieved.
For example, in related art methods as shown in FIG. 6, silicon oxide film 2a, silicon nitride film 2b and silicon oxide film 2c are formed on the surface of n-type silicon substrate 1 to form gate oxide film 2 of three-layer structure.
Subsequently, a first layer doped polysilicon film 3a is formed on gate oxide film 2 and patterned by the photolithography, and then silicon oxide film 5, which becomes an electrode insulating film, is formed by thermal oxidation.
A second layer doped polysilicon film is formed with silicon oxide film 5 as an electrode insulating film and flattened by a CMP or resist etch back method.
However, in the thermal oxidation process, horn-like protrusion T is sometimes formed. It has been found that this phenomenon becomes particularly conspicuous as the heating temperature in a thermal oxidation process lowers.
That is, thermal oxidation is conventionally mainly carried out at 950° C. or so, but a design rule also becomes minute with the fining and higher integration of a solid-state imaging devices, and the temperature of thermal oxidation is in tendency of being reduced to 900° C. or so, further 850° C. or so. It has been found that this problem is particularly conspicuous when thermal oxidation is performed at a low temperature.
Although details are unknown, it is thought that a horn-like protrusion grows at the upper edge part of the first electrode by the influence of stress and heat due to oxidation.
In the case of a single layer electrode structure, for example, a second doped polysilicon film is formed as the upper layer and flattened by CMP or resist etch back and, at the same time, the second doped polysilicon film is separated, a second electrode comprising the second layer doped polysilicon film (not shown) is formed between first electrode 3a comprising the first layer doped polysilicon film.
In this case, there is a problem that short circuit is liable to occur by the growth of protrusion T in the vicinity of the edge of the upper end of the electrode.
On the other hand, in the case of a double electrode structure, as shown in FIG. 7, second layer doped polysilicon film 3b is formed so as to overlap with a first electrode comprising a first layer doped polysilicon film 3a coated with silicon oxide film 5, and patterned by a desired mask formed by photolithography to thereby form a second electrode.
In particular in this structure, there is a problem that short circuit is liable to occur by the growth of protrusion T at the vicinity of the edge of the upper end of the electrode.
Thus, there are various problems in related art solid state imaging devices attributable to the growth of protrusion T in the vicinity of the upper edge of the pattern of the first layer electric conductive film by thermal oxidation, that is, the reduction of film quality of the insulating film between two contiguous electrodes, i.e., between the first and second electrodes, the reduction of electric pressure resistance, the reduction of step coverage, and the increase of the probability of occurrence of a leak.